Senior Software R&D Engineer, VLSI Physical Design

Job Description

Invent and develop new optimization engines to increase chip frequency and minimize power consumption. Improve C++ algorithms for various physical design tasks including gate-level sizing, buffering, and incremental parasitic extraction.

Requirements: Requires a BS, MS, or PhD in Electrical Engineering or Computer Science with over 6 years of experience in VLSI algorithm development using C++. Candidates must have a strong understanding of VLSI timing optimization and familiarity with industry-standard design implementation tools.

Key Skills: VLSI Physical Design Algorithms, C++, Timing Optimization, Sizing, Buffering, Clock Tree Synthesis, Legalization, Place and Route, Perl, Tcl, Python, ICC2, Innovus, PrimeTime, Tempus, StarRC

Benefits: Equity